About the role DroneShield is seeking a FPGA Engineer with relevant experience to join the team in Sydney, Australia.
The position will report to the Team lead, FPGA. The core challenge of the role is the development and expansion of our drone recognition and disruption algorithms using software-defined radios (SDRs). Implementing complex Digital Signal Processing algorithms into production grade firmware.
Responsibilities, Duties and Expectations Design, development, document and implementation of FPGA-based systems to support real-time Digital Signal Processing. Research and development of highly optimised RTL implementations of DSP, ML and statistical algorithms. Optimise the core of DroneShield's technology for accuracy, performance, stability, and maintenance. Scale the R&D, development, verification, and validation infrastructure. Qualifications, Experience and Skills BS/BE degree in Electronic Engineering, similar technical field of study or equivalent practical experience. 2+ years of qualified experience working within an established team. Strong experience with programming, debugging, and verifying Verilog, VHDL or SystemVerilog. Strong experience using and designing automated Verification and Validation frameworks. Experience with synthesis and complex timing closure on resource constrained FPGAs. Experience in high-speed digital design and building customized IP cores. FPGA development experience using FPGA software tools such as Vivado (preferable), Quartus, Vitis etc. Experience with designing and implementing high-throughput, low-latency and fully pipelined FPGA architectures. Experience writing C/C++ firmware for FPGA modules along with familiarity with scripting languages (Python preferable). Experience working in a Linux environment. Experience working with PCB schematics, board bring-ups and debugging hardware is highly desirable. Strong background and experience in Digital Signal Processing is highly desirable. A general RF background and knowledge of RF transmission protocols and general principles is desirable. Understanding or working knowledge of Machine Learning (ML) concepts within the scope of FPGA implementation would be ideal.
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