Work with cutting edge technology, making the world a safer and more secure place. DroneShield (ASX:DRO) offers an opportunity to solve some of world's most challenging technical problems in the Electronic Warfare, Artificial Intelligence and Machine Learning, RF sensing, Sensor Fusion and distributed systems. Working with high profile customers across militaries, government agencies, airports, critical infrastructure, law enforcement and many others.
With an approximately $1bn market capitalisation and having raised approximately $250m in 2024 alone, DroneShield is undergoing hypergrowth stage, fuelled by rapidly increasing use of drones for nefarious applications, from battlefield, to terrorism, to contraband delivery and commercial espionage.
This role is in the DroneShield Sydney headquarters in Pyrmont, Sydney. There are approximately 160 staff based in the 4,000sqm facility today, scheduled to grow to approximately 300 staff by end of 2026. Overseas on the ground presence includes Virginia (USA), Denmark, Germany and Dubai, as well as distributors in over 70 countries globally.
About the roleDroneShield is seeking a FPGA Engineer with relevant experience to join the team in Sydney, Australia. The position will report to the Team lead, FPGA. The core challenge of the role is the development and expansion of our drone recognition and disruption algorithms using software-defined radios (SDRs). Implementing complex Digital Signal Processing algorithms into production grade firmware.
Responsibilities, Duties and ExpectationsDesign, development, document and implementation of FPGA-based systems to support real-time Digital Signal Processing.Research and development of highly optimised RTL implementations of DSP, ML and statistical algorithms.Optimise the core of DroneShield's technology for accuracy, performance, stability, and maintenance.Scale the R&D, development, verification, and validation infrastructure.Qualifications, Experience and SkillsBS/BE degree in Electronic Engineering, similar technical field of study or equivalent practical experience.2+ years of qualified experience working within an established team.Strong experience with programming, debugging, and verifying Verilog, VHDL or SystemVerilog.Strong experience using and designing automated Verification and Validation frameworks.Experience with synthesis and complex timing closure on resource constrained FPGAs.Experience in high-speed digital design and building customized IP cores.FPGA development experience using FPGA software tools such as Vivado (preferable), Quartus, Vitis etc.Experience with designing and implementing high-throughput, low-latency and fully pipelined FPGA architectures.Experience writing C/C++ firmware for FPGA modules along with familiarity with scripting languages (Python preferable).Experience working in a Linux environment.Experience working with PCB schematics, board bring-ups and debugging hardware is highly desirable.Strong background and experience in Digital Signal Processing is highly desirable.A general RF background and knowledge of RF transmission protocols and general principles is desirable.Understanding or working knowledge of Machine Learning (ML) concepts within the scope of FPGA implementation would be ideal.
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