Analog Layout Engineer (Mvl)

Job Description Job Description
Description
Key Responsibilities:
Layout design of analog and high-speed transceiver circuit blocks, including amplifiers, drivers, ADC, DAC, LDO, PLL, filters, and other sensitive components. Floor planning and layout of passive and active components, such as resistors, capacitors, and inductors, considering signal integrity, power distribution, and parasitic effects. Design verification and sign-off, including DRC (Design Rule Check), LVS (Layout vs. Schematic), ERC (Electrical Rule Check), and ANT (Antenna) checks, using industry-standard tools. Collaborate with design engineers to optimize block-level floor planning and layout for performance and manufacturability. Continuously review and enhance layout quality, addressing signal integrity, power distribution, and parasitic concerns. Qualifications:
Associate degree or above with a focus on custom analog layout; BSEE or higher is preferred. 3+ years of industry experience in analog layout, specifically in deep sub-micron processes. Proficiency in floor planning and layout of analog blocks, including amplifiers, ADCs, PLLs, and filters. Strong understanding of device structures and their impact on performance. Ability to make informed trade-offs considering matching, coupling, parasitic effects, area, and other design constraints. Knowledge of ESD (Electrostatic Discharge) and latch-up prevention techniques. Proficiency in interpreting verification results (DRC, LVS, ERC, ANT) and taking corrective actions. Working knowledge of industry-standard tools such as Cadence Virtuoso and Mentor Calibre. Excellent communication skills and a collaborative team player. Skills & Other Details
Skill(s)
Layout Design
DRC
ADC
High-Speed Transceiver Circuit Blocks
Analog

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